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Searched refs:REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c284 REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK; in ddr3_dfs_high_2_low()
579 REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK; in ddr3_dfs_high_2_low()
886 REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK; in ddr3_dfs_low_2_high()
1298 REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK; in ddr3_dfs_low_2_high()
H A Dddr3_axp.h356 #define REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK 0xFFFFC0FF macro