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Searched refs:REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h1438 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1 macro
H A Ddce_11_0_sh_mask.h1342 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1 macro
H A Ddce_11_2_sh_mask.h1448 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1 macro
H A Ddce_12_0_sh_mask.h2399 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h56 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h410 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h338 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_1_0_sh_mask.h1829 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h735 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h451 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h456 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h437 #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT … macro