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Searched refs:RCPM_CLPCL10SETR_C0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dls102xa_psci.c169 setbits_be32(&rcpm->clpcl10setr, RCPM_CLPCL10SETR_C0); in ls1_deep_sleep()
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h410 #define RCPM_CLPCL10SETR_C0 0x00000001 macro