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Searched refs:RCC_PLLCFGR_PLL1RGE_SHIFT (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c61 #define RCC_PLLCFGR_PLL1RGE_SHIFT 2 macro
403 pllcfgr |= PLL1RGE_4_8_MHZ << RCC_PLLCFGR_PLL1RGE_SHIFT; in configure_clocks()