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Searched refs:RCC_PLL1DIVR_DIVQ1_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c53 #define RCC_PLL1DIVR_DIVQ1_MASK GENMASK(22, 16) macro
535 divq1 = readl(&regs->pll1divr) & RCC_PLL1DIVR_DIVQ1_MASK; in stm32_get_PLL1_rate()