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Searched refs:RCC_PLL1DIVR_DIVP1_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c50 #define RCC_PLL1DIVR_DIVP1_MASK GENMASK(15, 9) macro
532 divp1 = readl(&regs->pll1divr) & RCC_PLL1DIVR_DIVP1_MASK; in stm32_get_PLL1_rate()