Home
last modified time | relevance | path

Searched refs:R8A7790_CLK_Z (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dr8a7790-cpg-mssr.h12 #define R8A7790_CLK_Z 0 macro
H A Dr8a7790-clock.h19 #define R8A7790_CLK_Z 9 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dr8a7790-cpg-mssr.h16 #define R8A7790_CLK_Z 0 macro
H A Dr8a7790-clock.h23 #define R8A7790_CLK_Z 9 macro
/openbmc/u-boot/drivers/clk/renesas/
H A Dr8a7790-cpg-mssr.c57 DEF_BASE("z", R8A7790_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
/openbmc/linux/drivers/clk/renesas/
H A Dr8a7790-cpg-mssr.c55 DEF_BASE("z", R8A7790_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7790.dtsi79 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
121 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
142 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7790.dtsi78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;