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Searched refs:R8A7790_CLK_SD0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dr8a7790-cpg-mssr.h33 #define R8A7790_CLK_SD0 21 macro
H A Dr8a7790-clock.h17 #define R8A7790_CLK_SD0 7 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dr8a7790-cpg-mssr.h37 #define R8A7790_CLK_SD0 21 macro
H A Dr8a7790-clock.h21 #define R8A7790_CLK_SD0 7 macro
/openbmc/u-boot/drivers/clk/renesas/
H A Dr8a7790-cpg-mssr.c61 DEF_BASE("sd0", R8A7790_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
133 DEF_MOD("sdhi0", 314, R8A7790_CLK_SD0),
/openbmc/linux/drivers/clk/renesas/
H A Dr8a7790-cpg-mssr.c59 DEF_BASE("sd0", R8A7790_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
131 DEF_MOD("sdhi0", 314, R8A7790_CLK_SD0),