Searched refs:R8A7790_CLK_DDR (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | r8a7790-cpg-mssr.h | 31 #define R8A7790_CLK_DDR 19 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | r8a7790-cpg-mssr.h | 35 #define R8A7790_CLK_DDR 19 macro
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| /openbmc/u-boot/drivers/clk/renesas/ |
| H A D | r8a7790-cpg-mssr.c | 79 DEF_FIXED("ddr", R8A7790_CLK_DDR, CLK_PLL3, 8, 1),
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| /openbmc/linux/drivers/clk/renesas/ |
| H A D | r8a7790-cpg-mssr.c | 77 DEF_FIXED("ddr", R8A7790_CLK_DDR, CLK_PLL3, 8, 1),
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