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Searched refs:R7 (Results 1 – 25 of 78) sorted by relevance

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/openbmc/linux/arch/sh/kernel/cpu/sh3/
H A Dswsusp.S59 ! BL=0: R7->R0 is bank0
65 ! BL=1: R7->R0 is bank1
80 ! BL=0: R7->R0 is bank0
105 ! BL=0: R7->R0 is bank0
112 ! BL=1: R7->R0 is bank1
119 ! BL=0: R7->R0 is bank0
/openbmc/openbmc/poky/meta/conf/machine/include/arm/armv7r/
H A Dtune-cortexr7.inc2 # Tune Settings for Cortex-R7
6 TUNEVALID[cortexr7] = "Enable Cortex-R7 specific processor optimizations"
/openbmc/linux/tools/perf/arch/arm/tests/
H A Dregs_load.S11 #define R7 0x38 macro
48 str r7, [r0, #R7]
/openbmc/linux/Documentation/gpu/amdgpu/
H A Ddgpu-asic-info-table.csv4 AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, --
5 AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, --
6 AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE…
/openbmc/linux/tools/perf/arch/powerpc/tests/
H A Dregs_load.S12 #define R7 7 * 8 macro
51 std 7, R7(3)
/openbmc/linux/lib/
H A Dtest_bpf.c46 #define R7 BPF_REG_7 macro
3785 BPF_ALU64_IMM(BPF_MOV, R7, 7),
3795 BPF_ALU64_IMM(BPF_ADD, R7, 20),
3805 BPF_ALU64_IMM(BPF_SUB, R7, 10),
3815 BPF_ALU64_REG(BPF_ADD, R0, R7),
3827 BPF_ALU64_REG(BPF_ADD, R1, R7),
3839 BPF_ALU64_REG(BPF_ADD, R2, R7),
3851 BPF_ALU64_REG(BPF_ADD, R3, R7),
3863 BPF_ALU64_REG(BPF_ADD, R4, R7),
3875 BPF_ALU64_REG(BPF_ADD, R5, R7),
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_entry.S55 { memd(R0 + #_PT_R0706) = R7:6; \
99 { memd(R0 + #_PT_R0706) = R7:6; \
138 { R7:6 = memd(R0 + #_PT_R0706); \
169 R7:6 = memd(R0 + #_PT_R0706); \
/openbmc/linux/drivers/media/i2c/
H A Dwm8739.c36 R5 = 5, R6, R7, R8, R9, R15 = 15, enumerator
226 wm8739_write(sd, R7, 0x049); in wm8739_probe()
H A Dwm8775.c35 R7 = 7, R11 = 11, enumerator
240 wm8775_write(sd, R7, 0x000); in wm8775_probe()
/openbmc/linux/arch/powerpc/mm/nohash/
H A Dtlb_low.S205 PPC_ICBT(0,R6,R7) /* touch next cache line */
207 PPC_ICBT(0,R6,R7) /* touch next cache line */
209 PPC_ICBT(0,R6,R7) /* touch next cache line */
/openbmc/linux/tools/perf/arch/arm/util/
H A Dunwind-libdw.c27 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
/openbmc/linux/arch/hexagon/lib/
H A Dmemcpy.S143 #define ldata0 R7:6 /* even 8 bytes chunks */
145 #define data1 R7 /* lower 8 bytes of ldata1 */
160 #define back R7 /* nr bytes > dword boundary in src block */
/openbmc/linux/tools/perf/arch/loongarch/util/
H A Dunwind-libdw.c29 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
/openbmc/linux/tools/perf/arch/s390/util/
H A Dunwind-libdw.c33 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
/openbmc/linux/tools/perf/arch/powerpc/util/
H A Dunwind-libdw.c36 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
/openbmc/linux/drivers/net/hamradio/
H A Dz8530.h14 #define R7 7 macro
/openbmc/linux/drivers/tty/serial/
H A Dzs.h67 #define R7 7 macro
H A Dip22zilog.h46 #define R7 7 macro
H A Dsunzilog.h38 #define R7 7 macro
H A Dsunzilog.c211 write_zsreg(channel, R7, regs[R7]); in __load_zsregs()
237 write_zsreg(channel, R7, regs[R7p]); in __load_zsregs()
1350 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
1366 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
H A Dpmac_zilog.h124 #define R7 7 macro
/openbmc/linux/arch/powerpc/platforms/pseries/
H A DhvCall.S40 std r7,STK_PARAM(R7)(r1); \
52 ld r7,STACK_FRAME_MIN_SIZE+STK_PARAM(R7)(r1); \
/openbmc/linux/arch/powerpc/kvm/
H A Dbookehv_interrupts.S196 PPC_STL r7, VCPU_GPR(R7)(r4)
295 PPC_STL r7, VCPU_GPR(R7)(r11)
323 PPC_STL r7, VCPU_GPR(R7)(r11)
667 PPC_LL r7, VCPU_GPR(R7)(r4)
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-qcom-dc-scm-v1.dts112 /*R0-R7*/ "","","","","","","","",
/openbmc/linux/arch/ia64/kernel/
H A Dentry.h56 .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \

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