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Searched refs:QSGMII_SW1_A (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dt1040_serdes.c21 [0x60] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
23 [0x66] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
25 [0x67] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
27 [0x69] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B,
H A Dfsl_corenet2_serdes.c78 [QSGMII_SW1_A] = "QSGMII_SW1_A",
/openbmc/u-boot/drivers/net/fm/
H A Dt1040.c49 if (is_serdes_configured(QSGMII_SW1_A + port - FM1_DTSEC1) || in fman_port_enet_if()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_serdes.h75 QSGMII_SW1_A, /* Indicates ports on L2 Switch */ enumerator
/openbmc/u-boot/board/freescale/t104xrdb/
H A Deth.c108 if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A) >= 0) { in board_eth_init()
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dfsl_serdes.h156 QSGMII_SW1_A, /* Indicates ports on L2 Switch */ enumerator
/openbmc/u-boot/board/freescale/t1040qds/
H A Deth.c512 lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A); in board_eth_init()