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Searched refs:QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/mips/ath79/
H A Dclock.c492 QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; in qca955x_clocks_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h510 #define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h421 #define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f macro