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Searched refs:QCA953X_RTC_REG_SYNC_RESET (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S116 sw t1, QCA953X_RTC_REG_SYNC_RESET(t0)
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h930 #define QCA953X_RTC_REG_SYNC_RESET 0x40 macro