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Searched refs:QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dclk.c81 div = ((ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) in get_clocks()
/openbmc/linux/arch/mips/ath79/
H A Dclock.c408 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca953x_clocks_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h382 #define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 macro