Home
last modified time | relevance | path

Searched refs:QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S58 QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS | \
/openbmc/linux/arch/mips/ath79/
H A Dclock.c411 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca953x_clocks_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h448 #define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h378 #define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) macro