Home
last modified time | relevance | path

Searched refs:QCA953X_DDR_REG_DDR2_CONFIG (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c332 writel(DDR2_CONF_VAL, regs + QCA953X_DDR_REG_DDR2_CONFIG); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h274 #define QCA953X_DDR_REG_DDR2_CONFIG 0xb8 macro