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Searched refs:PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/pwr/
H A Dpwr_10_0_sh_mask.h27 #define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smuio/
H A Dsmuio_12_0_0_sh_mask.h30 #define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c2653 data |= PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK; in pwr_10_0_gfxip_control_over_cgpg()
2664 data &= ~PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK; in pwr_10_0_gfxip_control_over_cgpg()