| /openbmc/linux/drivers/pwm/ |
| H A D | Kconfig | 2 menuconfig PWM config
16 to register and unregister a PWM chip, an abstraction of a PWM
30 if PWM
58 Generic PWM framework driver for PWM controller present on
81 Generic PWM framework driver for the PWM output of the HLCDC
107 Generic PWM framework driver for Broadcom iProc PWM block. This
119 Generic PWM framework driver for Broadcom Kona PWM block.
332 Generic PWM framework driver for NXP LPC18xx PWM/SCT which
555 Generic PWM framework driver for the PWM controller on ST
566 Generic PWM framework driver for the PWM controller on
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | pwm.rst | 2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
65 The PWM user API also allows one to query the PWM state that was passed to the
71 In addition to the PWM state, the PWM API also exposes PWM arguments, which
72 are the reference PWM config one should use on this PWM.
73 PWM arguments are usually platform-specific and allows the PWM user to only
77 of the PWM user). PWM arguments are retrieved with pwm_get_args().
110 time of the PWM.
128 Implementing a PWM driver
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| H A D | miscellaneous.rst | 24 Pulse-Width Modulation (PWM)
30 The PWM framework provides an abstraction for providers and consumers of
31 PWM signals. A controller that provides one or more PWM signals is
36 A chip exposes one or more PWM signal sources, each of which exposed as
38 performed on PWM devices to control the period, duty cycle, polarity and
41 Note that PWM devices are exclusive resources: they can always only be
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| /openbmc/u-boot/doc/device-tree-bindings/pwm/ |
| H A D | pwm.txt | 1 Specifying PWM information for devices
4 1) PWM user nodes
7 PWM users should specify a list of PWM devices that they want to use
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
43 pwm-specifier typically encodes the chip-relative PWM number and the PWM
48 - PWM_POLARITY_INVERTED: invert the PWM signal polarity
50 Example with optional PWM specifier for inverse polarity
57 2) PWM controller nodes
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| /openbmc/linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm.txt | 1 Specifying PWM information for devices
4 1) PWM user nodes
7 PWM users should specify a list of PWM devices that they want to use
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
26 The following example could be used to describe a PWM-based backlight
43 pwm-specifier typically encodes the chip-relative PWM number and the PWM
48 - PWM_POLARITY_INVERTED: invert the PWM signal polarity
50 Example with optional PWM specifier for inverse polarity
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| H A D | pwm-lp3943.txt | 1 TI/National Semiconductor LP3943 PWM controller
9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
17 PWM 0 is for RGB LED brightness control
18 PWM 1 is for brightness control of LP8557 backlight device
26 * PWM 0 : output 8, 9 and 10
27 * PWM 1 : output 15
39 /* LEDs control with PWM 0 of LP3943 */
50 /* Backlight control with PWM 1 of LP3943 */
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| H A D | pwm-samsung.yaml | 7 title: Samsung SoC PWM timers
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16 PWM timer block provides 5 PWM channels (not all of them can drive physical
45 - "timers" - PWM base clock used to generate PWM signals,
47 - "pwm-tclk0" - first external PWM clock source,
48 - "pwm-tclk1" - second external PWM clock source.
69 use PWM clocksource.
81 A list of PWM channels used as PWM outputs on particular platform.
82 It is an array of up to 5 elements being indices of PWM channels
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| H A D | pxa-pwm.txt | 1 Marvell PWM controller
9 - reg: Physical base address and length of the registers used by the PWM channel
10 Note that one device instance must be created for each PWM that is used, so the
11 length covers only the register window for one PWM output, not that of the
12 entire PWM controller. Currently length is 0x10 for all supported devices.
16 Example PWM device node:
24 Example PWM client node:
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| H A D | pwm-sprd.txt | 1 Spreadtrum PWM controller
3 Spreadtrum SoCs PWM controller provides 4 PWM channels.
10 "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
11 "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
16 - assigned-clocks: Reference to the PWM clock entries.
17 - assigned-clock-parents: The phandle of the parent clock of PWM clock.
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| H A D | google,cros-ec-pwm.yaml | 7 title: PWM controlled by ChromeOS EC
14 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
16 An EC PWM node should be only found as a sub-node of the EC node (see
25 - description: PWM controlled using EC_PWM_TYPE_GENERIC channels.
28 - description: PWM controlled using CROS_EC_PWM_DT_<...> types.
33 description: The cell specifies the PWM index.
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| H A D | pwm-sifive.yaml | 8 title: SiFive PWM controller
14 Unlike most other PWM controllers, the SiFive PWM controller currently
15 only supports one period for all channels in the PWM. All PWMs need to
18 achievable period. PWM RTL that corresponds to the IP block version
36 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
38 SiFive PWM v0 IP block with no chip integration tweaks.
53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
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| H A D | pwm-st.txt | 1 STMicroelectronics PWM driver bindings
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
14 for PWM module.
17 - clocks: phandle of the clock used by the PWM module.
22 - st,pwm-num-chan: Number of available PWM channels. Default is 0.
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-pwm | 6 The pwm/ class sub-directory belongs to the Generic PWM
7 Framework and provides a sysfs interface for using PWM
16 probed PWM controller/chip where N is the base of the
17 PWM chip.
24 The number of PWM channels supported by the PWM chip.
31 Exports a PWM channel from the PWM chip for sysfs control.
39 Unexports a PWM channel.
47 each exported PWM channel where X is the exported PWM
55 Sets the PWM signal period in nanoseconds.
62 Sets the PWM signal duty cycle in nanoseconds.
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| H A D | sysfs-class-backlight-driver-lm3533 | 45 Set the PWM-input control mask (5 bits), where:
48 bit 5 PWM-input enabled in Zone 4
49 bit 4 PWM-input enabled in Zone 3
50 bit 3 PWM-input enabled in Zone 2
51 bit 2 PWM-input enabled in Zone 1
52 bit 1 PWM-input enabled in Zone 0
53 bit 0 PWM-input enabled
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| H A D | sysfs-class-led-driver-lm3533 | 64 Set the PWM-input control mask (5 bits), where:
67 bit 5 PWM-input enabled in Zone 4
68 bit 4 PWM-input enabled in Zone 3
69 bit 3 PWM-input enabled in Zone 2
70 bit 2 PWM-input enabled in Zone 1
71 bit 1 PWM-input enabled in Zone 0
72 bit 0 PWM-input enabled
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| /openbmc/u-boot/drivers/pwm/ |
| H A D | Kconfig | 2 bool "Enable support for pulse-width modulation devices (PWM)"
7 is often used to control a voltage level. The more time the PWM
8 spends in the 'high' state, the higher the voltage. The PWM's
13 bool "Enable support for the Exynos PWM"
16 This PWM is found on Samsung Exynos 5250 and other Samsung SoCs. It
22 bool "Enable support for the Rockchip PWM"
25 This PWM is found on RK3288 and other Rockchip SoCs. It supports a
31 bool "Enable support for the sandbox PWM"
39 bool "Enable support for the Tegra PWM"
42 This PWM is found on Tegra 20 and other Nvidia SoCs. It supports
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| /openbmc/linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver
3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
6 There can be upto 8 fans supported. Each fan can have one PWM output and
20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports.
32 representing a fan. If there are 8 fans each fan can have one PWM port and
34 For PWM port can be configured cooling-levels to create cooling device.
38 - reg : should specify PWM source port.
39 integer value in the range 0 to 7 with 0 indicating PWM port A and
40 7 indicating PWM port H.
42 - cooling-levels: PWM duty cycle values in a range from 0 to 255
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| H A D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM PWM and Fan Tacho controller device
3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
16 * "pwm" for the PWM registers.
20 * "pwm" for PWM controller operating clock.
24 - pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
30 Each fan subnode must have one PWM channel and at least one Fan tach channel.
32 For PWM channel can be configured cooling-levels to create cooling device.
36 - reg : specify the PWM output channel.
38 the PWM channel number that used.
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | adt7475.rst | 59 for measuring fan speed. There are three (3) PWM outputs that can be used
62 A sophisticated control system for the PWM outputs is designed into the
67 This feature can also be disabled for manual control of the PWM's.
121 an optimal configuration for the automatic PWM control.
126 The driver exposes two trip points per PWM channel.
128 - point1: Set the PWM speed at the lower temperature bound
129 - point2: Set the PWM speed at the higher temperature bound
131 The ADT747x will scale the PWM linearly between the lower and higher PWM
134 PWM outputs, and a given PWM output can be controlled by several temperature
135 channels. As a result, the ADT747x may compute more than one PWM value
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| H A D | dme1737.rst | 170 PWM Output Control
173 This chip features 5 PWM outputs. PWM outputs 1-3 are associated with fan
174 inputs 1-3 and PWM outputs 5-6 are associated with fan inputs 5-6. PWM outputs
179 appropriate PWM attribute. In automatic mode, the PWM attribute returns the
215 all PWM outputs are set to 100% duty-cycle.
280 output of the corresponding PWM is set
287 temp at which all PWM outputs are set
305 writeable if the associated PWM is in
320 fast the PWM duty-cycle will change
321 when the PWM is in automatic mode.
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| H A D | adt7470.rst | 25 There are four (4) PWM outputs that can be used to control fan speed.
27 A sophisticated control system for the PWM outputs is designed into the ADT7470
29 temperature sensors. Each PWM output is individually adjustable and
30 programmable. Once configured, the ADT7470 will adjust the PWM outputs in
32 feature can also be disabled for manual control of the PWM's.
51 determining an optimal configuration for the automatic PWM control.
58 * PWM Control
67 the temperature is between the two temperature boundaries. PWM values range
69 temperature sensor associated with the PWM control exceeds
72 The driver also allows control of the PWM frequency:
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| H A D | max31760.rst | 21 The MAX31760 integrates temperature sensing along with precision PWM fan
29 user-programmed PWM values. The flexible LUT-based architecture enables
49 1 PWM value for T < +18°C
50 2 PWM value for +18°C ≤ T < +20°C
51 3 PWM value for +20°C ≤ T < +22°C
53 47 PWM value for +108°C ≤ T < +110°C
54 48 PWM value for T ≥ +110°C
71 pwm1 PWM value for direct fan control
73 pwm1_freq PWM frequency in hertz
75 pwm1_auto_point[1-48]_pwm PWM value for LUT point
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| H A D | pwm-fan.rst | 4 This driver enables the use of a PWM module to drive a fan. It uses the
5 generic PWM interface thus it is hardware independent. It can be used on
6 many SoCs, as long as the SoC supplies a PWM line driver that exposes
7 the generic PWM API.
15 a PWM output. It uses the generic PWM interface, thus it can be used with
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| H A D | lm85.rst | 115 This feature can also be disabled for manual control of the PWM's.
152 The ADT7468 has a high-frequency PWM mode, where all PWM outputs are
155 all 3 PWM outputs to a 22.5 kHz frequency. Conversely, setting any PWM
225 PWM Control
228 There are three PWM outputs. The LM85 datasheet suggests that the
234 - this specifies the PWM value for temp#_auto_temp_off
235 temperature. (PWM value from 0 to 255)
249 PWM Controlling Zone selection
253 - controls zone that is associated with PWM
265 0 PWM always 0% (off)
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | renesas,rz-mtu3.yaml | 43 complementary PWM and reset-synchronized PWM operation.
71 PWM output.
87 The module supports PWM mode{1,2}, Reset-synchronized PWM mode and
88 complementary PWM mode{1,2,3}.
90 In complementary PWM mode, six positive-phase and six negative-phase PWM
95 pwm0 - MTU0.MTIOC0A PWM mode 1
96 pwm1 - MTU0.MTIOC0C PWM mode 1
97 pwm2 - MTU1.MTIOC1A PWM mode 1
98 pwm3 - MTU2.MTIOC2A PWM mode 1
99 pwm4 - MTU3.MTIOC3A PWM mode 1
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