| /openbmc/linux/arch/arm/kernel/ |
| H A D | kgdb.c | 160 .cpsr_mask = PSR_T_BIT | MODE_MASK,
168 .cpsr_mask = PSR_T_BIT | MODE_MASK,
169 .cpsr_val = PSR_T_BIT | SVC_MODE,
176 .cpsr_mask = PSR_T_BIT | MODE_MASK,
184 .cpsr_mask = PSR_T_BIT | MODE_MASK,
185 .cpsr_val = PSR_T_BIT | SVC_MODE,
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| H A D | ptrace.c | 215 .cpsr_mask = PSR_T_BIT,
223 .cpsr_mask = PSR_T_BIT,
224 .cpsr_val = PSR_T_BIT,
231 .cpsr_mask = PSR_T_BIT,
232 .cpsr_val = PSR_T_BIT,
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| H A D | swp_emulate.c | 233 .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
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| H A D | entry-common.S | 203 tst saved_psr, #PSR_T_BIT
218 tst saved_psr, #PSR_T_BIT @ this is SPSR from save_user_regs
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| H A D | signal.c | 370 cpsr |= PSR_T_BIT; in setup_return()
372 cpsr &= ~PSR_T_BIT; in setup_return()
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| H A D | traps.c | 714 .cpsr_mask = PSR_T_BIT,
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| H A D | entry-armv.S | 273 THUMB( tst r5, #PSR_T_BIT ) @ exception taken in Thumb mode?
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| /openbmc/linux/arch/arm/include/asm/ |
| H A D | ptrace.h | 31 (((regs)->ARM_cpsr & PSR_T_BIT))
39 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
76 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; in valid_user_regs()
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| H A D | unified.h | 28 #define PSR_ISETSTATE PSR_T_BIT
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| H A D | efi.h | 30 PSR_T_BIT | MODE_MASK)
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| H A D | processor.h | 75 regs->ARM_cpsr |= PSR_T_BIT; \
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| H A D | thread_info.h | 115 .cpsr_mask = MODE_MASK | PSR_T_BIT, in register_iwmmxt_undef_handler()
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| H A D | assembler.h | 446 THUMB( orr \reg , \reg , #PSR_T_BIT )
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| /openbmc/linux/arch/arm/include/uapi/asm/ |
| H A D | ptrace.h | 72 #define PSR_T_BIT V7M_PSR_T_BIT macro
75 #define PSR_T_BIT V4_PSR_T_BIT macro
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| /openbmc/linux/arch/arm/vfp/ |
| H A D | vfpmodule.c | 782 .cpsr_mask = PSR_T_BIT,
788 .cpsr_mask = PSR_T_BIT,
794 .cpsr_mask = PSR_T_BIT,
795 .cpsr_val = PSR_T_BIT,
800 .cpsr_mask = PSR_T_BIT,
801 .cpsr_val = PSR_T_BIT,
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| /openbmc/linux/arch/arm/probes/ |
| H A D | decode-arm.c | 73 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx1()
86 regs->ARM_cpsr &= ~PSR_T_BIT; in simulate_blx2bx()
88 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx2bx()
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| H A D | decode.h | 43 cpsr |= PSR_T_BIT; in bx_write_pc()
46 cpsr &= ~PSR_T_BIT; in bx_write_pc()
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| /openbmc/linux/arch/arm/probes/uprobes/ |
| H A D | core.c | 207 .cpsr_mask = (PSR_T_BIT | MODE_MASK),
215 .cpsr_mask = (PSR_T_BIT | MODE_MASK),
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| /openbmc/linux/arch/arm/mm/ |
| H A D | abort-macro.S | 14 tst \psr, #PSR_T_BIT
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| H A D | abort-ev6.S | 33 tsteq r5, #PSR_T_BIT @ Thumb?
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| H A D | abort-lv4t.S | 19 tst r5, #PSR_T_BIT @ check for thumb mode
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| /openbmc/u-boot/arch/arm/include/asm/ |
| H A D | unified.h | 30 #define PSR_ISETSTATE PSR_T_BIT
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| /openbmc/linux/arch/arm/probes/kprobes/ |
| H A D | opt-arm.c | 64 " tst r1, #"__stringify(PSR_T_BIT)"\n"
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| H A D | actions-thumb.c | 97 regs->ARM_cpsr &= ~PSR_T_BIT; in t32_simulate_branch()
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