Searched refs:PSC_REG_MDCTL (Results 1 – 3 of 3) sorted by relevance
130 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()133 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()160 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_enable_module()178 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_disable_module()182 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_disable_module()204 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_reset_iso()206 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_reset_iso()255 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_module_keep_in_reset_enabled()265 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_module_keep_in_reset_enabled()269 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_module_keep_in_reset_enabled()[all …]
412 PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3A)); in ddr3_err_reset_workaround()416 PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3A)); in ddr3_err_reset_workaround()423 PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3B)); in ddr3_err_reset_workaround()426 PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3B)); in ddr3_err_reset_workaround()
27 #define PSC_REG_MDCTL(x) (0xa00 + (4 * (x))) macro