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Searched refs:PR_CCS (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/cris/
H A Dop_helper.c149 ccs = env->pregs[PR_CCS]; in cris_ccs_rshift()
157 env->pregs[PR_CCS] = ccs; in cris_ccs_rshift()
166 env->pregs[PR_CCS], in helper_rfe()
183 env->pregs[PR_CCS], in helper_rfn()
510 env->pregs[PR_CCS] in helper_top_evaluate_flags()
516 env->pregs[PR_CCS] in helper_top_evaluate_flags()
521 env->pregs[PR_CCS] in helper_top_evaluate_flags()
534 env->pregs[PR_CCS] = in helper_top_evaluate_flags()
540 env->pregs[PR_CCS] = in helper_top_evaluate_flags()
556 env->pregs[PR_CCS] = in helper_top_evaluate_flags()
[all …]
H A Dhelper.c47 ccs = env->pregs[PR_CCS]; in cris_shift_ccs()
49 env->pregs[PR_CCS] = ccs; in cris_shift_ccs()
113 assert(!(env->pregs[PR_CCS] & PFIX_FLAG)); in crisv10_cpu_do_interrupt()
125 env->pregs[PR_CCS] &= ~M_FLAG_V10; in crisv10_cpu_do_interrupt()
142 if (env->pregs[PR_CCS] & U_FLAG) { in crisv10_cpu_do_interrupt()
155 env->pregs[PR_CCS], in crisv10_cpu_do_interrupt()
181 env->pregs[PR_CCS] &= ~M_FLAG_V32; in cris_cpu_do_interrupt()
208 env->pregs[PR_CCS], in cris_cpu_do_interrupt()
217 if (env->pregs[PR_CCS] & U_FLAG) { in cris_cpu_do_interrupt()
237 env->pregs[PR_CCS], in cris_cpu_do_interrupt()
[all …]
H A Dtranslate.c569 tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], X_FLAG); in cris_evaluate_flags()
571 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~X_FLAG); in cris_evaluate_flags()
1054 tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], C_FLAG); in gen_store()
1062 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~C_FLAG); in gen_store()
1932 tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], flags); in dec_setclrf()
1934 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~flags); in dec_setclrf()
1970 if (dc->op2 == PR_CCS) { in dec_move_rp()
1985 if (dc->op2 == PR_CCS) { in dec_move_rp()
1997 if (dc->op2 == PR_CCS) { in dec_move_pr()
2236 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~3); in dec_test_m()
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H A Dcpu.h61 #define PR_CCS 13 macro
265 return !!(env->pregs[PR_CCS] & U_FLAG); in cpu_mmu_index()
286 (env->pregs[PR_CCS] & (S_FLAG | P_FLAG | U_FLAG in cpu_get_tb_cpu_state()
H A Dtranslate_v10.c.inc81 tcg_gen_andi_tl(t1, cpu_PR[PR_CCS], F_FLAG_V10);
88 tcg_gen_or_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], t1); /*P=F*/
118 tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], PFIX_FLAG);
286 c, cpu_PR[PR_CCS]);
368 tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], flags);
370 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS],
475 if (dc->dst == PR_CCS) {
794 if (dc->dst == PR_CCS) {
797 tcg_gen_andi_tl(t0, cpu_PR[PR_CCS], ~PFIX_FLAG);
1006 tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~3);
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H A Dcpu.c77 env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG; in cris_cpu_reset_hold()
80 env->pregs[PR_CCS] = 0; in cris_cpu_reset_hold()