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Searched refs:PRV_S (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dpmu.c114 (env->priv == PRV_S && virt_on && in riscv_pmu_incr_ctr_rv32()
118 (env->priv == PRV_S && !virt_on && in riscv_pmu_incr_ctr_rv32()
155 (env->priv == PRV_S && virt_on && in riscv_pmu_incr_ctr_rv64()
159 (env->priv == PRV_S && !virt_on && in riscv_pmu_incr_ctr_rv64()
207 g_assert(env->priv <= PRV_S); in riscv_pmu_icount_update_priv()
216 g_assert(newpriv <= PRV_S); in riscv_pmu_icount_update_priv()
247 g_assert(env->priv <= PRV_S); in riscv_pmu_cycle_update_priv()
256 g_assert(newpriv <= PRV_S); in riscv_pmu_cycle_update_priv()
H A Dinternals.h50 ret = PRV_S; in mmuidx_priv()
H A Dgdbstub.c236 new_priv = PRV_S; in riscv_gdb_set_virtual()
H A Dcpu_bits.h698 #define PRV_S 1 macro
/openbmc/qemu/hw/intc/
H A Driscv_imsic.c219 if (priv == PRV_S) { in riscv_imsic_rmw()
386 riscv_cpu_set_aia_ireg_rmw_fn(env, (imsic->mmode) ? PRV_M : PRV_S, in riscv_imsic_realize()
/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h65 #define PRV_S 1 macro