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Searched refs:PRIX32 (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/hw/net/
H A Dtrace-events476 … uint32_t intr_en, int level) "%s: Status Reg: 0x%04" PRIX32 " Interrupt Enable Reg: 0x%04" PRIX32…
477 …t_desc_read(const char* name, uint32_t desc_addr) "%s: attempting to read descriptor @0x%04" PRIX32
478 npcm_gmac_packet_receive(const char* name, uint32_t len) "%s: RX packet length: 0x%04" PRIX32
479 …en, uint32_t rx_buf_addr) "%s: Receiving into Buffer size: 0x%04" PRIX32 " at address 0x%04" PRIX32
480 …packet_received(const char* name, uint32_t len) "%s: Reception finished, packet left: 0x%04" PRIX32
482 …ess: %p Descriptor 0: 0x%04" PRIX32 " Descriptor 1: 0x%04" PRIX32 "Descriptor 2: 0x%04" PRIX32 " D…
483 …(const char* name, uint32_t tdes0, uint32_t tdes1) "%s: Tdes0: 0x%04" PRIX32 " Tdes1: 0x%04" PRIX32
/openbmc/u-boot/include/
H A Dinttypes.h126 # define PRIX32 "X" macro
/openbmc/qemu/hw/misc/
H A Dauxbus.c110 DPRINTF("request at address 0x%" PRIX32 ", command %u, len %u\n", address, in aux_request()
/openbmc/qemu/hw/display/
H A Dxlnx_dp.c928 DPRINTF("vblend: write @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_vblend_write()
1015 DPRINTF("vblend: read @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_vblend_read()
1042 DPRINTF("avbufm: write @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_avbufm_write()
/openbmc/qemu/hw/scsi/
H A Dtrace-events250 lsi_bad_phase_jump(uint32_t dsp) "Data phase mismatch jump to 0x%"PRIX32
/openbmc/qemu/hw/i386/
H A Dintel_iommu.c1160 "slpte=0x%" PRIx64 ", pasid=0x%" PRIX32 ")", in vtd_iova_to_slpte()