Searched refs:PRIX32 (Results 1 – 5 of 5) sorted by relevance
/openbmc/u-boot/include/ |
H A D | inttypes.h | 126 # define PRIX32 "X" macro
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/openbmc/qemu/hw/misc/ |
H A D | auxbus.c | 110 DPRINTF("request at address 0x%" PRIX32 ", command %u, len %u\n", address, in aux_request()
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/openbmc/qemu/hw/display/ |
H A D | xlnx_dp.c | 928 DPRINTF("vblend: write @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_vblend_write() 1015 DPRINTF("vblend: read @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_vblend_read() 1042 DPRINTF("avbufm: write @0x%" HWADDR_PRIX " = 0x%" PRIX32 "\n", offset, in xlnx_dp_avbufm_write()
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/openbmc/qemu/hw/scsi/ |
H A D | trace-events | 249 lsi_bad_phase_jump(uint32_t dsp) "Data phase mismatch jump to 0x%"PRIX32
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/openbmc/qemu/hw/i386/ |
H A D | intel_iommu.c | 1135 "slpte=0x%" PRIx64 ", pasid=0x%" PRIX32 ")", in vtd_iova_to_slpte()
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