Searched refs:PP_HOST_TO_SMC_UL (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | pp_endian.h | 27 #define PP_HOST_TO_SMC_UL(X) cpu_to_be32(X) macro 33 #define CONVERT_FROM_HOST_TO_SMC_UL(X) ((X) = PP_HOST_TO_SMC_UL(X))
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | ci_smumgr.c | 1011 table->LinkLevel[i].DownT = PP_HOST_TO_SMC_UL(5); in ci_populate_smc_link_level() 1012 table->LinkLevel[i].UpT = PP_HOST_TO_SMC_UL(30); in ci_populate_smc_link_level() 1460 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); in ci_populate_smc_acpi_level() 1483 PP_HOST_TO_SMC_UL(dll_cntl); in ci_populate_smc_acpi_level() 1485 PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl); in ci_populate_smc_acpi_level() 1491 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in ci_populate_smc_acpi_level() 1493 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1); in ci_populate_smc_acpi_level() 1497 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in ci_populate_smc_acpi_level() 1499 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2); in ci_populate_smc_acpi_level() 1643 arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dramTiming); in ci_populate_memory_timing_parameters() [all …]
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H A D | vegam_smumgr.c | 469 table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count); in vegam_populate_smc_mvdd_table() 586 table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5); in vegam_populate_smc_link_level() 587 table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30); in vegam_populate_smc_link_level() 1268 arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing); in vegam_populate_memory_timing_parameters() 1269 arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2); in vegam_populate_memory_timing_parameters() 1270 arb_regs->McArbBurstTime = PP_HOST_TO_SMC_UL(burst_time); in vegam_populate_memory_timing_parameters() 1271 arb_regs->McArbRfshRate = PP_HOST_TO_SMC_UL(rfsh_rate); in vegam_populate_memory_timing_parameters() 1272 arb_regs->McArbMisc3 = PP_HOST_TO_SMC_UL(misc3); in vegam_populate_memory_timing_parameters() 1585 PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a0); in vegam_populate_avfs_parameters() 1587 PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a1); in vegam_populate_avfs_parameters() [all …]
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H A D | polaris10_smumgr.c | 685 table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count); in polaris10_populate_smc_mvdd_table() 832 table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5); in polaris10_populate_smc_link_level() 833 table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30); in polaris10_populate_smc_link_level() 1344 table->MemoryACPILevel.MinMvdd = PP_HOST_TO_SMC_UL(vol_level.Voltage); in polaris10_populate_smc_acpi_level() 1483 arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing); in polaris10_populate_memory_timing_parameters() 1484 arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2); in polaris10_populate_memory_timing_parameters() 2104 table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]); in polaris10_init_smc_table() 2621 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2623 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in polaris10_update_dpm_settings() 2635 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() [all …]
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H A D | iceland_smumgr.c | 782 PP_HOST_TO_SMC_UL(5); in iceland_populate_smc_link_level() 784 PP_HOST_TO_SMC_UL(30); in iceland_populate_smc_link_level() 1506 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level() 1529 PP_HOST_TO_SMC_UL(dll_cntl); in iceland_populate_smc_acpi_level() 1531 PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl); in iceland_populate_smc_acpi_level() 1537 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in iceland_populate_smc_acpi_level() 1539 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1); in iceland_populate_smc_acpi_level() 1543 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in iceland_populate_smc_acpi_level() 1545 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2); in iceland_populate_smc_acpi_level() 1604 arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dramTiming); in iceland_populate_memory_timing_parameters() [all …]
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H A D | tonga_smumgr.c | 525 PP_HOST_TO_SMC_UL(5); in tonga_populate_smc_link_level() 527 PP_HOST_TO_SMC_UL(30); in tonga_populate_smc_link_level() 1248 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); in tonga_populate_smc_acpi_level() 1271 PP_HOST_TO_SMC_UL(dll_cntl); in tonga_populate_smc_acpi_level() 1273 PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl); in tonga_populate_smc_acpi_level() 1279 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL); in tonga_populate_smc_acpi_level() 1285 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1); in tonga_populate_smc_acpi_level() 1287 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2); in tonga_populate_smc_acpi_level() 1853 PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient); in tonga_populate_bapm_parameters_in_dpm_table() 2100 data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]); in tonga_convert_mc_registers() [all …]
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H A D | fiji_smumgr.c | 843 table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5); in fiji_populate_smc_link_level() 844 table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30); in fiji_populate_smc_link_level() 1401 PP_HOST_TO_SMC_UL(us_mvdd * VOLTAGE_SCALE); in fiji_populate_smc_acpi_level() 1515 arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing); in fiji_populate_memory_timing_parameters() 1516 arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2); in fiji_populate_memory_timing_parameters() 2091 table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]); in fiji_init_smc_table() 2583 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2585 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings() 2597 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2600 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings() [all …]
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