Searched refs:POWER_AND_PLL_CTRL_REG (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| H A D | high_speed_env_spec.c | 197 {POWER_AND_PLL_CTRL_REG, 0x800, 0x0e0, {0x0, 0x80}, 0, 0},
611 {POWER_AND_PLL_CTRL_REG, 0x800, 0x1f, {0x2}, 0, 0},
625 {POWER_AND_PLL_CTRL_REG, 0x800, 0x1f, {0x3}, 0, 0},
639 {POWER_AND_PLL_CTRL_REG, 0x800, 0x1f, {0x0}, 0, 0},
699 {POWER_AND_PLL_CTRL_REG, 0x800, 0xff, {0xfc81}, 0, 0},
2114 reg_data = reg_read(POWER_AND_PLL_CTRL_REG + in hws_ref_clock_set()
2118 reg_write(POWER_AND_PLL_CTRL_REG + in hws_ref_clock_set()
|
| H A D | sys_env_lib.h | 39 #define POWER_AND_PLL_CTRL_REG 0xa0004 macro
|