Searched refs:PMU_REG_3P0_CLR_RSVD2_MASK (Results 1 – 1 of 1) sorted by relevance
1541 #define PMU_REG_3P0_CLR_RSVD2_MASK 0xFFC00000u macro1543 … (((uint32_t)(((uint32_t)(x))<<PMU_REG_3P0_CLR_RSVD2_SHIFT))&PMU_REG_3P0_CLR_RSVD2_MASK)