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Searched refs:PMINTENSET (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/arm/include/asm/
H A Darm_pmuv3.h24 #define PMINTENSET __ACCESS_CP15(c9, 0, c14, 1) macro
167 write_sysreg(val, PMINTENSET); in write_pmintenset()
/openbmc/linux/drivers/perf/
H A Dqcom_l3_pmu.c98 #define PMINTENSET(__cntr) (1UL << ((__cntr) & 0x7)) macro
292 writel_relaxed(PMINTENSET(idx), l3pmu->regs + L3_M_BC_INTENSET); in qcom_l3_cache__32bit_counter_start()
/openbmc/linux/drivers/perf/arm_cspmu/
H A Darm_cspmu.c52 #define PMINTENSET 0xC40 macro
751 inten_off = PMINTENSET + (4 * reg_id); in arm_cspmu_enable_counter()