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Searched refs:PMC_PLL_CTRL0_DIV_MSK (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/at91/
H A Dclk-sam9x60-pll.c18 #define PMC_PLL_CTRL0_DIV_MSK GENMASK(7, 0) macro
22 #define PLL_DIV_MAX (FIELD_GET(PMC_PLL_CTRL0_DIV_MSK, UINT_MAX) + 1)
747 div->div = FIELD_GET(PMC_PLL_CTRL0_DIV_MSK, val); in sam9x60_clk_register_div_pll()