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Searched refs:PMCNTENCLR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/perf/
H A Dqcom_l3_pmu.c94 #define PMCNTENCLR(__cntr) (1UL << ((__cntr) & 0x7)) macro
232 writel_relaxed(PMCNTENCLR(idx), l3pmu->regs + L3_M_BC_CNTENCLR); in qcom_l3_cache__64bit_counter_stop()
233 writel_relaxed(PMCNTENCLR(idx + 1), l3pmu->regs + L3_M_BC_CNTENCLR); in qcom_l3_cache__64bit_counter_stop()
307 writel_relaxed(PMCNTENCLR(idx), l3pmu->regs + L3_M_BC_CNTENCLR); in qcom_l3_cache__32bit_counter_stop()
/openbmc/linux/arch/arm/include/asm/
H A Darm_pmuv3.h16 #define PMCNTENCLR __ACCESS_CP15(c9, 0, c12, 2) macro
162 write_sysreg(val, PMCNTENCLR); in write_pmcntenclr()
/openbmc/linux/drivers/perf/arm_cspmu/
H A Darm_cspmu.c51 #define PMCNTENCLR 0xC20 macro
766 cnten_off = PMCNTENCLR + (4 * reg_id); in arm_cspmu_disable_counter()