Home
last modified time | relevance | path

Searched refs:PLPRCR_CSR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dcpu.c201 setbits_be32(&immap->im_clkrst.car_plprcr, PLPRCR_CSR); in do_reset()
/openbmc/u-boot/include/
H A Dmpc8xx.h151 #define PLPRCR_CSR 0x00000080 /* CheskStop Reset value */ macro