Searched refs:PLL_SUBSYS_BASE (Results 1 – 3 of 3) sorted by relevance
81 #define MPU_PLL_BASE (PLL_SUBSYS_BASE + 0x048)82 #define L3_PLL_BASE (PLL_SUBSYS_BASE + 0x110)83 #define DDR_PLL_BASE (PLL_SUBSYS_BASE + 0x290)100 #define OSC_SRC_CTRL (PLL_SUBSYS_BASE + 0x2C0)
34 #define PLL_SUBSYS_BASE 0x481C5000 macro
514 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */