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Searched refs:PLL_MODE_NORM (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/rockchip/
H A Dclk-pll.c22 #define PLL_MODE_NORM 0x1 macro
208 if (cur_parent == PLL_MODE_NORM) { in rockchip_rk3036_pll_set_params()
243 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
441 if (cur_parent == PLL_MODE_NORM) { in rockchip_rk3066_pll_set_params()
478 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
690 if (cur_parent == PLL_MODE_NORM) { in rockchip_rk3399_pll_set_params()
727 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3399_pll_set_params()
938 if (cur_parent == PLL_MODE_NORM) { in rockchip_rk3588_pll_set_params()
973 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3588_pll_set_params()
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c77 PLL_MODE_NORM, enumerator
276 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift); in rkclk_set_pll()
H A Dclk_rk3399.c92 PLL_MODE_NORM, enumerator
354 PLL_MODE_NORM << PLL_MODE_SHIFT); in rkclk_set_pll()