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Searched refs:PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h8384 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h2080 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h11632 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h11444 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV__SHIFT 0x10 macro