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Searched refs:PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV_RESET_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h8380 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV_RESET_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h2075 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV_RESET_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h11627 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV_RESET_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h11439 #define PLL_IDCLK_CNTL__PLL_DIFF_POST_DIV_RESET_MASK 0x100 macro