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Searched refs:PLL_FBDIV_REG (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/axs10x/
H A Di2s_pll_clock.c20 #define PLL_FBDIV_REG 0x4 macro
105 fbdiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_FBDIV_REG)); in i2s_pll_recalc_rate()
145 i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv); in i2s_pll_set_rate()