Searched refs:PLL_DIVF1_MASK (Results 1 – 1 of 1) sorted by relevance
26 #define PLL_DIVF1_MASK GENMASK(18, 13) macro337 divf1 = FIELD_GET(PLL_DIVF1_MASK, val); in clk_sscg_pll_recalc_rate()372 val &= ~(PLL_DIVF1_MASK | PLL_DIVF2_MASK); in clk_sscg_pll_set_rate()374 val |= FIELD_PREP(PLL_DIVF1_MASK, setup->divf1); in clk_sscg_pll_set_rate()