Searched refs:PLL_CNTL (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.h | 35 SRI(PLL_CNTL, BPHYC_PLL, id)
39 SRI(PLL_CNTL, DCCG_PLL, id)
49 CS_SF(PLL_CNTL, PLL_REF_DIV_SRC, mask_sh),\
223 uint32_t PLL_CNTL; member
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| H A D | dce_clock_source.c | 483 REG_GET(PLL_CNTL, PLL_REF_DIV_SRC, &field); in dce110_get_pix_clk_dividers_helper()
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| /openbmc/linux/drivers/video/fbdev/ |
| H A D | i740_reg.h | 193 #define PLL_CNTL 0xCE macro
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| H A D | i740fb.c | 828 i740outreg(par, XRX, PLL_CNTL, par->pll_cntl); in i740fb_set_par()
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