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Searched refs:PLL_AUPLL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588.dtsi27 assigned-clock-parents = <&cru PLL_AUPLL>;
44 assigned-clock-parents = <&cru PLL_AUPLL>;
61 assigned-clock-parents = <&cru PLL_AUPLL>;
78 assigned-clock-parents = <&cru PLL_AUPLL>;
H A Drk3588s.dtsi533 <&cru PLL_PPLL>, <&cru PLL_AUPLL>,
947 assigned-clock-parents = <&cru PLL_AUPLL>;
964 assigned-clock-parents = <&cru PLL_AUPLL>;
981 assigned-clock-parents = <&cru PLL_AUPLL>;
1486 assigned-clock-parents = <&cru PLL_AUPLL>, <&cru PLL_AUPLL>;
1541 assigned-clock-parents = <&cru PLL_AUPLL>;
1561 assigned-clock-parents = <&cru PLL_AUPLL>;
/openbmc/linux/include/dt-bindings/clock/
H A Drockchip,rk3588-cru.h19 #define PLL_AUPLL 4 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3588.c680 [aupll] = PLL(pll_rk3588, PLL_AUPLL, "aupll", mux_pll_p,