Home
last modified time | relevance | path

Searched refs:PLL_35XX_RATE (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5420.c1403 PLL_35XX_RATE(24 * MHZ, 2000000000, 250, 3, 0),
1404 PLL_35XX_RATE(24 * MHZ, 1900000000, 475, 6, 0),
1405 PLL_35XX_RATE(24 * MHZ, 1800000000, 225, 3, 0),
1425 PLL_35XX_RATE(24 * MHZ, 825000000, 275, 4, 1),
1426 PLL_35XX_RATE(24 * MHZ, 728000000, 182, 3, 1),
1427 PLL_35XX_RATE(24 * MHZ, 633000000, 211, 4, 1),
1428 PLL_35XX_RATE(24 * MHZ, 543000000, 181, 2, 2),
1429 PLL_35XX_RATE(24 * MHZ, 413000000, 413, 6, 2),
1430 PLL_35XX_RATE(24 * MHZ, 275000000, 275, 3, 3),
1431 PLL_35XX_RATE(24 * MHZ, 206000000, 206, 3, 3),
[all …]
H A Dclk-exynos5260.c38 PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
39 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
40 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
41 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
46 PLL_35XX_RATE(24 * MHZ, 933000000, 311, 4, 1),
47 PLL_35XX_RATE(24 * MHZ, 900000000, 300, 4, 1),
48 PLL_35XX_RATE(24 * MHZ, 800000000, 200, 3, 1),
50 PLL_35XX_RATE(24 * MHZ, 700000000, 175, 3, 1),
52 PLL_35XX_RATE(24 * MHZ, 633000000, 211, 4, 1),
53 PLL_35XX_RATE(24 * MHZ, 620000000, 310, 3, 2),
[all …]
H A Dclk-exynos5250.c717 PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
718 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
719 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
725 PLL_35XX_RATE(24 * MHZ, 900000000, 150, 4, 0),
726 PLL_35XX_RATE(24 * MHZ, 800000000, 100, 3, 0),
727 PLL_35XX_RATE(24 * MHZ, 700000000, 175, 3, 1),
728 PLL_35XX_RATE(24 * MHZ, 600000000, 200, 4, 1),
729 PLL_35XX_RATE(24 * MHZ, 500000000, 125, 3, 1),
730 PLL_35XX_RATE(24 * MHZ, 400000000, 100, 3, 1),
731 PLL_35XX_RATE(24 * MHZ, 300000000, 200, 4, 2),
[all …]
H A Dclk-exynos3250.c675 PLL_35XX_RATE(24 * MHZ, 1200000000, 400, 4, 1),
676 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 3, 1),
677 PLL_35XX_RATE(24 * MHZ, 1066000000, 533, 6, 1),
678 PLL_35XX_RATE(24 * MHZ, 1000000000, 250, 3, 1),
679 PLL_35XX_RATE(24 * MHZ, 960000000, 320, 4, 1),
680 PLL_35XX_RATE(24 * MHZ, 900000000, 300, 4, 1),
681 PLL_35XX_RATE(24 * MHZ, 850000000, 425, 6, 1),
682 PLL_35XX_RATE(24 * MHZ, 800000000, 200, 3, 1),
683 PLL_35XX_RATE(24 * MHZ, 700000000, 175, 3, 1),
685 PLL_35XX_RATE(24 * MHZ, 600000000, 400, 4, 2),
[all …]
H A Dclk-exynos5433.c738 PLL_35XX_RATE(24 * MHZ, 2500000000U, 625, 6, 0),
739 PLL_35XX_RATE(24 * MHZ, 2400000000U, 500, 5, 0),
740 PLL_35XX_RATE(24 * MHZ, 2300000000U, 575, 6, 0),
741 PLL_35XX_RATE(24 * MHZ, 2200000000U, 550, 6, 0),
742 PLL_35XX_RATE(24 * MHZ, 2100000000U, 350, 4, 0),
743 PLL_35XX_RATE(24 * MHZ, 2000000000U, 500, 6, 0),
744 PLL_35XX_RATE(24 * MHZ, 1900000000U, 475, 6, 0),
745 PLL_35XX_RATE(24 * MHZ, 1800000000U, 375, 5, 0),
746 PLL_35XX_RATE(24 * MHZ, 1700000000U, 425, 6, 0),
747 PLL_35XX_RATE(24 * MHZ, 1600000000U, 400, 6, 0),
[all …]
H A Dclk-exynos4.c1108 PLL_35XX_RATE(24 * MHZ, 1704000000, 213, 3, 0),
1109 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
1110 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
1111 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
1112 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
1113 PLL_35XX_RATE(24 * MHZ, 1200000000, 200, 4, 0),
1114 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 6, 0),
1115 PLL_35XX_RATE(24 * MHZ, 1000000000, 125, 3, 0),
1116 PLL_35XX_RATE(24 * MHZ, 900000000, 150, 4, 0),
1117 PLL_35XX_RATE(24 * MHZ, 800000000, 100, 3, 0),
[all …]
H A Dclk-fsd.c149 PLL_35XX_RATE(24 * MHZ, 2000000000U, 250, 3, 0),
153 PLL_35XX_RATE(24 * MHZ, 2400000000U, 200, 2, 0),
157 PLL_35XX_RATE(24 * MHZ, 2400000000U, 200, 2, 0),
161 PLL_35XX_RATE(24 * MHZ, 1800000000U, 150, 2, 0),
1476 PLL_35XX_RATE(24 * MHZ, 666000000U, 111, 4, 0),
1636 PLL_35XX_RATE(24 * MHZ, 1066000000U, 533, 12, 0),
H A Dclk-pll.h48 #define PLL_35XX_RATE(_fin, _rate, _m, _p, _s) \ macro