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Searched refs:PLLREFE_BASE_ENABLE (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1071 #define PLLREFE_BASE_ENABLE BIT(30) macro
1095 value = PLLREFE_BASE_ENABLE | in tegra_pllref_enable()