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Searched refs:PLLE_BASE_ENABLE_CML (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c629 #define PLLE_BASE_ENABLE_CML (1 << 31) macro
684 value &= ~PLLE_BASE_ENABLE_CML; in tegra_plle_enable()
716 value |= PLLE_BASE_ENABLE_CML | PLLE_BASE_ENABLE; in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c658 #define PLLE_BASE_ENABLE_CML (1 << 31) macro
713 value &= ~PLLE_BASE_ENABLE_CML; in tegra_plle_enable()
762 value |= PLLE_BASE_ENABLE_CML | PLLE_BASE_ENABLE; in tegra_plle_enable()