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Searched refs:PLLCTL_PLLPWRDN (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/mach-davinci/
H A Dpm.c58 val |= PLLCTL_PLLPWRDN; in davinci_pm_suspend()
80 val &= ~PLLCTL_PLLPWRDN; in davinci_pm_suspend()
H A Dclock.h15 #define PLLCTL_PLLPWRDN BIT(1) macro
H A Dsleep.S90 orr ip, ip, #PLLCTL_PLLPWRDN
115 bic ip, ip, #PLLCTL_PLLPWRDN
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dpll_defs.h47 #define PLLCTL_PLLPWRDN (1 << 1) macro
/openbmc/u-boot/arch/arm/mach-davinci/
H A Ddm365_lowlevel.c30 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLPWRDN); in dm365_pll1_init()
107 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLPWRDN); in dm365_pll2_init()
H A Dda850_lowlevel.c76 clrbits_le32(&reg->pllctl, PLLCTL_PLLPWRDN); in da850_pll_init()
/openbmc/linux/drivers/clk/davinci/
H A Dpll.c62 #define PLLCTL_PLLPWRDN BIT(1) macro