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Searched refs:PLL0_PLLREG_LEVEL_V45 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/video/tegra124/
H A Dsor.h231 #define PLL0_PLLREG_LEVEL_V45 (3 << 6) macro
H A Dsor.c711 PLL0_PLLREG_LEVEL_V45 | in tegra_dc_sor_enable_dp()