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Searched refs:PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c119 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen6_emit_flush_rcs()
325 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen7_emit_flush_rcs()
H A Dgen8_engine_cs.c30 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen8_emit_flush_rcs()
144 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen11_emit_flush_rcs()
322 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen12_emit_flush_rcs()
H A Dintel_gpu_commands.h306 #define PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (1<<11) /* MBZ on ILK */ macro
H A Dintel_lrc.c1345 cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE, 0); in gen12_emit_indirect_ctx_rcs()
1368 PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE, in gen12_emit_indirect_ctx_xcs()