Searched refs:PIPEACONF_ENABLE (Results 1 – 7 of 7) sorted by relevance
366 pipeconf |= PIPEACONF_ENABLE; in oaktrail_crtc_hdmi_mode_set()406 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_hdmi_dpms()407 REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()413 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_hdmi_dpms()414 REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()448 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_hdmi_dpms()449 REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()455 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_hdmi_dpms()456 REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()
265 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_dpms()267 temp | PIPEACONF_ENABLE, i); in oaktrail_crtc_dpms()309 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_dpms()311 temp & ~PIPEACONF_ENABLE, i); in oaktrail_crtc_dpms()
252 if ((temp & PIPEACONF_ENABLE) == 0) in gma_crtc_dpms()253 REG_WRITE(map->conf, temp | PIPEACONF_ENABLE); in gma_crtc_dpms()300 if ((temp & PIPEACONF_ENABLE) != 0) { in gma_crtc_dpms()301 REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE); in gma_crtc_dpms()
390 if (!(reg_val & PIPEACONF_ENABLE)) in gma_crtc_enable_vblank()466 if (!(reg_val & PIPEACONF_ENABLE)) { in gma_crtc_get_vblank_counter()
208 pipeconf |= PIPEACONF_ENABLE; in psb_intel_crtc_mode_set()
480 #define PIPEACONF_ENABLE (1 << 31) macro
720 pipeconf |= PIPEACONF_ENABLE; in cdv_intel_crtc_mode_set()