/openbmc/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | pinmux.c | 10 #define PIN(pin, f0, f1, f2, f3) \ macro 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI), 26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI), 27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI), 28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI), 29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI), 30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI), 31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI), 32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI), 33 PIN(ULPI_CLK_PY0, SPI1, RSVD2, UARTD, ULPI), [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra114/ |
H A D | pinmux.c | 10 #define PIN(pin, f0, f1, f2, f3) \ macro 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI), 26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI), 27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI), 28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI), 29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI), 30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI), 31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI), 32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI), 33 PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI), [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra124/ |
H A D | pinmux.c | 10 #define PIN(pin, f0, f1, f2, f3) \ macro 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI), 26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI), 27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI), 28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI), 29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI), 30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI), 31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI), 32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI), 33 PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI), [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
H A D | pinmux.c | 10 #define PIN(pin, f0, f1, f2, f3) \ macro 25 PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3), 26 PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3), 27 PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3), 28 PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3), 29 PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3), 30 PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3), 33 PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3), 34 PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3), 35 PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3), [all …]
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/openbmc/u-boot/drivers/pinctrl/meson/ |
H A D | pinctrl-meson-gxl.c | 19 PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), 20 PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), 21 PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), 143 PIN(GPIODV_1, EE_OFF), 144 PIN(GPIODV_2, EE_OFF), 145 PIN(GPIODV_3, EE_OFF), 146 PIN(GPIODV_4, EE_OFF), 147 PIN(GPIODV_5, EE_OFF), 148 PIN(GPIODV_6, EE_OFF), 149 PIN(GPIODV_7, EE_OFF), [all …]
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H A D | pinctrl-meson-gxbb.c | 19 PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), 20 PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), 21 PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), 70 PIN(GPIOAO_5, 0) }; 395 BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), 396 BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_16, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0), 398 BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_3, EE_OFF), 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), 399 BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), 400 BANK("CARD", PIN(CARD_0, EE_OFF), PIN(CARD_6, EE_OFF), 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), 401 BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_17, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), [all …]
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H A D | pinctrl-meson-axg.c | 897 BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), 898 BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), 899 BANK("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), 900 BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), 901 BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0), 906 BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
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H A D | pinctrl-meson.h | 92 #define PIN(x, b) (b + x) macro 115 #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
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H A D | pinctrl-meson-gx.h | 38 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
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H A D | pinctrl-meson-axg.h | 56 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
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/openbmc/u-boot/arch/arm/mach-tegra/tegra20/ |
H A D | pinmux.c | 270 #define PIN(pingrp, f0, f1, f2, f3) \ macro 279 PIN(NONE, RSVD1, RSVD2, RSVD3, RSVD4) 294 PIN(DAP2, DAP2, TWC, RSVD3, GMI), 308 PIN(KBCB, KBC, NAND, SDIO2, MIO), 315 PIN(KBCF, KBC, NAND, TRACE, MIO), 332 PIN(SPIA, SPI1, SPI2, SPI3, GMI), 333 PIN(SPIB, SPI1, SPI2, SPI3, GMI), 334 PIN(SPIC, SPI1, SPI2, SPI3, GMI), 335 PIN(SPID, SPI2, SPI1, SPI2_ALT, GMI), 336 PIN(SPIE, SPI2, SPI1, SPI2_ALT, GMI), [all …]
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/openbmc/u-boot/drivers/video/ |
H A D | bus_vcxk.c | 23 #define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \ argument 25 writel(PIN, &pio->PORT.per); \ 26 writel(PIN, &pio->PORT.DDR); \ 27 writel(PIN, &pio->PORT.mddr); \ 29 writel(PIN, &pio->PORT.puer); \ 32 #define VCXK_SET_PIN(PORT, PIN) writel(PIN, &pio->PORT.sodr); argument 33 #define VCXK_CLR_PIN(PORT, PIN) writel(PIN, &pio->PORT.codr); argument 44 #define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \ argument 45 if (I0O1) DDR |= PIN; else DDR &= ~PIN; 47 #define VCXK_SET_PIN(PORT, PIN) PORT |= PIN; argument [all …]
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/openbmc/linux/drivers/pinctrl/cirrus/ |
H A D | pinctrl-lochnagar.c | 476 LN_FUNC("dsp-gpio1", PIN, 0x01), 477 LN_FUNC("dsp-gpio2", PIN, 0x02), 478 LN_FUNC("dsp-gpio3", PIN, 0x03), 479 LN_FUNC("codec-gpio1", PIN, 0x04), 480 LN_FUNC("codec-gpio2", PIN, 0x05), 481 LN_FUNC("codec-gpio3", PIN, 0x06), 482 LN_FUNC("codec-gpio4", PIN, 0x07), 483 LN_FUNC("codec-gpio5", PIN, 0x08), 484 LN_FUNC("codec-gpio6", PIN, 0x09), 485 LN_FUNC("codec-gpio7", PIN, 0x0A), [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-pocketbeagle.dts | 216 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */ 225 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */ 234 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */ 243 /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */ 252 /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */ 261 /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */ 270 /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */ 279 /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */ 288 /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */ 297 /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | fsl,imx27-pinctrl.txt | 10 setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. 12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable 13 configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin 90 For convenience there are macros defined in imx27-pinfunc.h which provide PIN
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H A D | renesas,rzn1-pinctrl.yaml | 67 (PIN | MUX_FUNC << 8) 68 where PIN directly corresponds to the pl_gpio pin number and
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-mxs.yaml | 14 The Freescale MXS GPIO controller is part of MXS PIN controller. 16 As the GPIO controller is embedded in the PIN controller and all the 17 GPIO ports share the same IO space with PIN controller, the GPIO node
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/openbmc/openbmc/poky/meta/recipes-support/pinentry/ |
H A D | pinentry_1.2.1.bb | 1 SUMMARY = "Collection of simple PIN or passphrase entry dialogs" 3 Pinentry is a collection of simple PIN or passphrase entry dialogs which \
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/openbmc/u-boot/doc/uImage.FIT/ |
H A D | signature.txt | 434 Signature PIN ....: forced 436 Max. PIN lengths .: 32 32 32 437 PIN retry counter : 3 0 3 448 PIN = '123456' Admin PIN = '12345678' 488 Label: OpenPGP card (User PIN (sig)) 497 …315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%29 498 Label: OpenPGP card (User PIN) 511 …d;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29" 512 …PIN (sig))' with URL 'pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxx… 513 Enter PIN: [all …]
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/openbmc/linux/Documentation/userspace-api/media/cec/ |
H A D | cec-ioc-dqevent.rst | 153 * .. _`CEC-EVENT-PIN-CEC-LOW`: 160 * .. _`CEC-EVENT-PIN-CEC-HIGH`: 167 * .. _`CEC-EVENT-PIN-HPD-LOW`: 176 * .. _`CEC-EVENT-PIN-HPD-HIGH`: 185 * .. _`CEC-EVENT-PIN-5V-LOW`: 194 * .. _`CEC-EVENT-PIN-5V-HIGH`:
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/gammu/gammu/ |
H A D | gammu-smsdrc | 34 # PIN for SIM card 35 PIN = 0000
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r9a07g043-smarc-pmod.dtso | 12 * |CN7 (PMOD1 PIN HEADER) |
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/openbmc/linux/Documentation/arch/arm/samsung/ |
H A D | gpio.rst | 22 PIN configuration
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/openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hikey970-pmic.dtsi | 35 ldo4: ldo4 { /* 40 PIN */
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/openbmc/u-boot/doc/ |
H A D | README.bus_vcxk | 41 defines the number of the I/O line PIN in the port
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