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Searched refs:PHY_RSTZ (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/hisilicon/kirin/
H A Ddw_dsi_reg.h20 #define PHY_RSTZ 0xA0 /* D-PHY reset control */ macro
H A Ddw_drm_dsi.c378 writel(0, base + PHY_RSTZ); in dsi_set_mipi_phy()
424 writel(PHY_ENABLECLK, base + PHY_RSTZ); in dsi_set_mipi_phy()
426 writel(PHY_ENABLECLK | PHY_UNSHUTDOWNZ, base + PHY_RSTZ); in dsi_set_mipi_phy()
428 writel(PHY_ENABLECLK | PHY_UNRSTZ | PHY_UNSHUTDOWNZ, base + PHY_RSTZ); in dsi_set_mipi_phy()
583 writel(0, base + PHY_RSTZ); in dsi_encoder_disable()
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_mipi.c226 rk_mipi_dsi_write(regs, PHY_RSTZ, 0); in rk_mipi_phy_enable()
328 rk_mipi_dsi_write(regs, PHY_RSTZ, 1); in rk_mipi_phy_enable()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Drockchip_mipi_dsi.h115 #define PHY_RSTZ DSI_HOST_BITS(0x0a0, 1, 1) macro
/openbmc/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-mipi-dsi.c186 #define PHY_RSTZ 0 macro
596 dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ); in dw_mipi_dsi_disable()
816 | PHY_RSTZ | PHY_SHUTDOWNZ); in dw_mipi_dsi_dphy_init()
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Ddw-mipi-dsi-rockchip.c36 #define PHY_RSTZ 0 macro