Searched refs:PHY_CTRL1 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/phy/freescale/ |
| H A D | phy-fsl-imx8mq-usb.c | 19 #define PHY_CTRL1 0x4 macro
260 value = readl(imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
264 writel(value, imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
274 value = readl(imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
276 writel(value, imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
297 value = readl(imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
300 writel(value, imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
312 value = readl(imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
314 writel(value, imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
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| /openbmc/linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-usb-ss.c | 21 #define PHY_CTRL1 0x70 macro
55 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, in qcom_ssphy_do_reset()
58 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, 0); in qcom_ssphy_do_reset()
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci_am654.c | 30 #define PHY_CTRL1 0x100 macro
225 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val); in sdhci_am654_setup_dll()
228 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, in sdhci_am654_setup_dll()
260 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_setup_delay_chain()
278 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_set_clock()
718 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
731 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
975 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
988 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
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