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Searched refs:PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h4053 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h4167 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h4611 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h10577 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h20077 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_3_0_3_sh_mask.h21884 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43993 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_1_0_sh_mask.h41189 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_3_0_1_sh_mask.h36727 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h43268 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h49540 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49902 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro