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Searched refs:PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h20073 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h21876 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43985 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h36719 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h40527 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h45190 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h43293 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h46285 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h47498 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h43260 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h49532 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49894 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h40479 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_sh_mask.h51767 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_0_sh_mask.h4218 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h4339 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_3_sh_mask.h4368 #define PHY_AUX_CNTL__AUX2_PAD_RXSEL__SHIFT … macro